Suzanne Rivoire - Research

Research Overview

My research focuses on power-aware computing for large-scale systems, such as the datacenters that support the Web and the supercomputers that conduct massive scientific simulations.

Managing power and energy in real time
With collaborators at Oak Ridge National Laboratory, my students and I studied the power signatures of HPC applications. We showed that applications can be accurately identified based on simple statistical summaries of their power traces (E2SC 2014, HPPAC 2014), and then built on that work to recognize phases in power traces consisting of concatenations of known kernels (PMBS 2016).

In the data center context, colleagues at Microsoft Research and I demonstrated that accurate power models can significantly improve the performance of ad-hoc power capping schemes (PASA 2014).

Energy-efficiency metrics
My doctoral work proposed Joulesort (SIGMOD 2007), the first fully specified, full-system energy-efficiency benchmark. In this work, we provided the first historical analysis of energy efficiency for data-intensive computing, and we showed subtle pitfalls in designing an appropriate metric that balances power and performance. More recently, I worked with the Energy-Efficient High-Performance Computing Working Group to develop appropriate measurement rules for the Green500, the definitive ranking of energy-efficient supercomputers (SC 2015).

High-level, black-box power models
I undertook the first systematic study of full-system power consumption models, showing the tradeoffs between accuracy, complexity, and portability (HotPower '08). Prior models had largely focused on individual components, such as the processor, for which it is possible to build detailed models based on often-proprietary design information. This approach is infeasible, however, for a full node or system, which is a collection of components from different vendors that have complex interactions.

The models I built and evaluated predict a computer's power consumption based on software-accessible measures of hardware utilization. Later, with collaborators at Microsoft Research, I extended this work to use more generic and portable measures of utilization that were less tied to specific hardware. To maintain high accuracy in the absence of low-level information, we used application knowledge and more sophisticated machine learning techniques (IISWC '12). We also demonstrated the inadequacy of previous techniques of scaling power models from a single node to a cluster or datacenter and proposed a principled approach for scaling power models (EXERT '11 and CAL '12).

System design for energy efficiency
In developing the Joulesort benchmark (SIGMOD 2007), we measured the energy efficiency of a variety of systems for I/O-intensive computation. The ``winning'' system, consisting of a laptop dual-core CPU and an array of laptop disks, preceded a wave of interest in low-power, energy-efficient servers. We followed this work by recapturing the JouleSort title in 2010 with an array of solid-state drives (Microsoft Research technical report, 2010) and branched out to other workload types with an analysis of energy efficiency for clusters running data-intensive workloads (WEED 2010).

Publication List

Names marked with * were SSU undergraduate students.

Energy-Efficient Computing

  • “Phase Recognition from Power Traces of HPC Workloads,” Joseph Granados*, Jake Probst*, Nick Armour*, Jeff Bahns*, Suzanne Rivoire, Chung-Hsing Hsu. Short paper, 7th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), November 2016. [paper] [slides]
  • “Node Variability in Large-Scale Power Measurements: Perspectives from the Green500, Top500 and EEHPCWG,” Thomas Scogland, Jonathan Azose, David Rohr, Natalie Bates, Suzanne Rivoire, Daniel Hackenberg, Torsten Wilde, James H. Rogers. International Conference on High-Performance Computing, Networking, Storage, and Analysis (SC), November 2015. [paper]
  • “Power Signatures of High-Performance Computing Workloads,” Jacob Combs*, Jolie Nazor*, Rachelle Thysell*, Fabian Santiago*, Lowell Olson*, Matthew Hardwick*, Suzanne Rivoire, Chung-Hsing Hsu, Stephen W. Poole. 2nd Workshop on Energy-Efficient Supercomputing (E2SC), November 2014. [paper] [slides]
  • “Star-Cap: Cluster Power Management Using Software-Only Models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt. 3rd Workshop on Power-aware Algorithms, Systems, and Architectures (PASA), September 2014.
    This version of the paper is different from the version in the proceedings. The direction of the second inequality in Section 4C has been corrected.
    [paper] [slides]
  • “Application Power Signature Analysis,” Chung-Hsing Hsu, Jacob Combs*, Jolie Nazor*, Fabian Santiago*, Rachelle Thysell*, Suzanne Rivoire, Stephen W. Poole. 10th Workshop on High-Performance, Power-Aware Computing (HPPAC), May 2014. [paper]
  • “Including Variability in Large-Scale Cluster Power Models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt, Ehsan K. Ardestani. Computer Architecture Letters, July-December 2012. (Invited paper; revision of EXERT 2011) [paper]
  • “CHAOS: Composable highly accurate OS-based power models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt, Ehsan K. Ardestani. IEEE International Symposium on Workload Characterization (IISWC), November 2012. [paper] [slides]
  • “Star-Cap: Cluster Power Management Using Software-Only Models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt. Microsoft Research Technical Report MSR-TR-2012-107, October 2012. [link]
  • “No Hardware Required: Building and Validating Composable Highly Accurate OS-based Power Models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt, Ehsan K. Ardestani. Microsoft Research Technical Report MSR-TR-2011-89, July 2011. [link]
  • “Accounting for Variability in Large-Scale Cluster Power Models,” John D. Davis, Suzanne Rivoire, Moises Goldszmidt, Ehsan K. Ardestani. Exascale Evaluation and Research Techniques Workshop (EXERT), held at the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2011. [paper] [slides]
  • “The Search for Energy-Efficient Building Blocks for the Data Center,” Laura Keys, John D. Davis, Suzanne Rivoire. Workshop on Energy-Efficient Design (WEED), held at the International Symposium on Computer Architecture (ISCA), June 2010. [paper] [pptx slides]
  • “Building energy-efficient systems for sequential I/O workloads,” John D. Davis, Suzanne Rivoire. Microsoft Research Technical Report MSR-TR-2010-30, March 2010. [link]
  • “Models and Metrics for Energy-Efficient Computing,” Parthasarathy Ranganathan, Suzanne Rivoire, Justin D. Moore. In Advances in Computers, vol. 75, 2009.
  • “A Comparison of High-Level Full-System Power Models,” Suzanne Rivoire, Parthasarathy Ranganathan, Christos Kozyrakis. Workshop on Power Aware Computing and Systems (HotPower), held at the Symposium on Operating Systems Design and Implementation (OSDI), December 2008. [paper] [slides]
  • “Models and Metrics to Enable Energy-Efficiency Optimizations,” Suzanne Rivoire, Mehul A. Shah, Parthasarathy Ranganathan, Christos Kozyrakis, Justin Meza. IEEE Computer, vol. 40, no. 12, December 2007, pp. 39-48. [article]
  • “JouleSort: A Balanced Energy-Efficiency Benchmark,” Suzanne Rivoire, Mehul A. Shah, Parthasarathy Ranganathan, Christos Kozyrakis. SIGMOD International Conference on Management of Data, June 2007, pp. 365-376. [paper] [slides]
  • “Full-System Power Analysis and Modeling for Server Environments,” Dimitris Economou, Suzanne Rivoire, Christos Kozyrakis, Parthasarathy Ranganathan. Workshop on Modeling, Benchmarking, and Simulation (MoBS), held at the International Symposium on Computer Architecture (ISCA), June 2006. [paper] [slides]

Computer Science and Engineering Education

  • “Universal Design for Learning in CS1 (poster),” Suzanne Rivoire. ACM SIGCSE Technical Symposium on Computer Science Education, March 2011. [proposal] [poster]
  • “Learning to Teach,” Suzanne Rivoire. IEEE Potentials, vol. 29, no. 4, July/August 2010, pp. 17-20. [article]
  • “A Breadth-First Course in Multicore and Manycore Programming,” Suzanne Rivoire. ACM SIGCSE Technical Symposium on Computer Science Education, March 2010, pp. 214-218. [paper] [slides] [course materials]

Other

  • “Vector Lane Threading,” Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda, Christos Kozyrakis. International Conference on Parallel Processing (ICPP), August 2006, pp. 55-64. [paper] [slides]

Dissertation

Models and Metrics for Energy-Efficient Computer Systems, Suzanne Rivoire. Doctoral dissertation, Stanford University Department of Electrical Engineering, June 2008. [dissertation] [slides]

CREU Project Pages

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