Suzanne Rivoire

Email: suzanne.rivoire@sonoma.edu
Postal mail: Sonoma State University Department of Computer Science
1801 East Cotati Avenue
Rohnert Park, CA 94928
Telephone: 707-664-3337
Web: http://rivoire.cs.sonoma.edu
Last revised: October 2, 2008

Current Position

Assistant Professor of Computer Science, Sonoma State University (CA), starting August 2008.


Education

Ph.D. in Electrical Engineering, June 2008.

Stanford University (CA)
Thesis: "Models and Metrics for Energy-Efficient Computer Systems." [paper][slides]
Committee: Christos Kozyrakis (advisor); Partha Ranganathan; Kunle Olukotun

M.S. in Electrical Engineering, January 2003.

Stanford University (CA)
GPA: 3.91/4.0

B.S. in Electrical Engineering with highest honors, May 2001.

University of Texas at Austin
GPA: 3.95/4.0


Refereed Publications

   
[Computer]   "Models and Metrics to Enable Energy-Efficiency Optimizations." S. Rivoire, M. A. Shah, P. Ranganathan, C. Kozyrakis, and J. Meza. IEEE Computer, vol. 40, no. 12, December 2007, pp. 39-48. [pdf]
[SIGMOD07]   "JouleSort: A Balanced Energy-Efficiency Benchmark." S. Rivoire, M. A. Shah, P. Ranganathan, C. Kozyrakis. SIGMOD International Conference on Management of Data, June 2007. [paper] [slides]
[ICPP06]   "Vector Lane Threading." S. Rivoire, R. Schultz, T. Okuda, C. Kozyrakis. International Conference on Parallel Processing (ICPP), August 2006. [paper] [slides]
[MoBS06]   "Full-System Power Analysis and Modeling for Server Environments." D. Economou, S. Rivoire, C. Kozyrakis, P. Ranganathan. Workshop on Modeling, Benchmarking, and Simulation (MoBS), held in conjunction with ISCA, June 2006. [paper] [slides]

Teaching and Mentoring


Invited Talks and Panels


Professional Activities


Work Experience

HP Labs, Intern, 6/2005-10/2006

Mentor: Partha Ranganathan
Thesis research in the area of power consumption in enterprise systems. Developed a high-level model for server power and proposed power-performance metrics.

Cray, Intern, 6/2003-9/2003

Mentor: Steve Scott
Developed theoretical model and simulator of a clustered vector processor architecture.

Compaq, Intern, 5/2001-9/2001

Mentor: David Joy
Benchmarked, debugged, and tested firmware for Integrated Lights-Out (iLO) server management product.


Honors and Awards


Other Activities